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Laxmi Narayan Bhuyan
is Distinguished Professor and Chairman of Computer Science
and Engineering Department at the University of California,
Riverside (UCR). Prior to joining UCR in January 2001, he
was a professor of Computer Science at Texas A&M University
(1989-2000) and Program Director of the Computer System Architecture
Program at the National Science Foundation (1998-2000). He
has also worked as a consultant to Intel and HP Labs.
Dr. Bhuyan received
his Ph.D. degree in Computer Engineering from Wayne State
University in 1982. His current research interests are in
the areas of network packet processing, multiprocessor architectures,
network processors and I/O architectures, high-performance
IP routers, parallel and distributed processing, and performance
evaluation. He has published more than 200 papers in these
areas in IEEE Transactions on Computers (TC), IEEE Transactions
on Parallel and Distributed Systems (TPDS), Journal of Parallel
and Distributed Computing (JPDC), and many refereed conference
proceedings.
Dr. Bhuyan served as
the Editor-in-Chief of the IEEE Transactions on Parallel and
Distributed Systems (TPDS) from 2006 to 2009. He is a past
Editor of the IEEE TC, JPDC, and Parallel Computing Journal.
His professional activities are too numerous to describe.
To mention a few, he was the founding Program Committee Chairman
of the HPCA in 1995, Program Chair of the IPDPS in 1996, General
Chair of ADCOM-2001, and General Chair of HPCA-9 (2003). He
was elected Chair of the IEEE Computer Society Technical Committee
on Computer Architecture (TCCA) between1995-1998.
Dr. Bhuyan is a Fellow
of the IEEE, a Fellow of the ACM, a Fellow of the AAAS (American
Association for the Advancement of Science), and a Fellow
of the WIF (World Innovation Foundation). He has also been
named as an ISI Highly Cited Researcher in Computer Science.
He was awarded the IEEE CS Outstanding Contribution Award
in 1997. He was inducted into the Distinguished Alumni Hall
of Fame of the Wayne State University College of Engineering
in October 2010. He also received the Distinguished Alumnus
Award from National Institute of Technology, Rourkela in 2011.
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Title:
Network I/O Acceleration: Removing a Major Bottleneck in the
Next Generation Servers
Abstract:
The faster growth of network bandwidth compared to that of
the CPU performance has led to a growing mismatch between
the transmission bandwidth and packet processing speed of
the servers. The problem is particularly acute in web and
data center servers, where the workload is very much I/O driven
and millions of clients request for service. Virtual Machine
(VM) technology is experiencing a resurgent interest as the
ubiquitous multi-core processors have become the de facto
configuration on modern servers, and cloud computing. Unfortunately,
the virtualization imposes even large overhead while processing
I/O requests.
It
is known that network protocol stack processing in the operating
system is the major bottleneck in processing I/O requests
in servers. This talk presents detailed timing behavior and
architectural characteristics of the TCP/IP protocol stack
while executing in the CPU. We also provide detailed measurement
and analysis to fully understand the major challenges faced
by I/O virtualization over high speed networks in the areas
of data movement and packet switching. We investigate various
architectural techniques for incorporation in the server architectures
to enhance I/O processing speed. They consist of techniques
like Direct Cache Access (DCA), New DMA descriptor, Integrated
NIC and design of hardware copy engines among others. In a
virtualized environment, we implement a static onloading scheme
to separate interrupt handling from application processes
and execute them on cores with cache affinity. Based on the
observed benefits, we modify the Xen scheduler and run experiments
to show the improvement for web servers.
http://www.cs.ucr.edu/~bhuyan
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