R. Govindarajan
IISc Banglore

    

 

R. Govindarajan received his B.Sc. degree in Mathematics from Madras University in 1981 and B.E. (Electronics and Communication) and Ph.D. (Computer Science) degrees from the Indian Institute of Science, Bangalore in 1984 and 1989 respectively. He has held postdoctoral research positions and visiting faculty positions at Universities in USA and Canada. Since 1995, he has been with the Supercomputer Education and Research Centre and the Department of Computer Science and Automation, Indian Institute of Science, Bangalore. Currently he is a professor and the chairman of the Supercomputer Education and Research Centre. His research interests are in the areas of High Performance Computing, Compilation Techniques, and Computer Architecture. He has more than 120 publications in international journals and refereed conferences in these areas. He is a Fellow of the Indian National Academy of Engineering, Senior member of IEEE, and a Member of ACM and IEEE Computer Society.

Title: The Role of Accelerators in HPC Systems: Challenges and
Opportunities

Abstract: Rapid advancements in multi-core processor architectures along with low-cost, low-latency, high-bandwidth interconnects have made clusters of multi-core machines a common resource in today's world. Accelerators such as Graphics Processing Units, Many Integrated Cores, Specialized accelerators built using FPGAs, etc. are playing an increasing role in rapidly increasing the performance of HPC systems. While the theoretical performance and sustained performance reported on specific benchmark programs are promising, achieving a similar performance on real-world applications present many challenges. In this talk we will describe the different types of parallelism that can be exploited in heterogeneous accelerator-based multi-core architectures. We will discuss the how the accelerator architectures are evolving taking specific examples. We present various work (including our own) on automatically compiling programs written in different high-level languages for heterogeneous GPU-based architectures. We conclude by discussing the main challenges ahead and future research directions in accelerator-based architecture.

http://www.serc.iisc.ernet.in/~govind/index.html

 

 

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