Title of the Talk 

Power Consumption in Multi-core Processors

 Speaker 

 :

M. Balakrishnan
Professor in the Department of Computer Science &
Engineering at I.I.T. Delhi, India

M. Balakrishnan is a Professor in the Department of Computer Science & Engineering at I.I.T. Delhi. He obtained his B.E.(Hons.) in Electronics & Electrical Engg. from BITS Pilani in 1977 and Ph.D. from EE Dept. IIT Delhi in 1985. He worked as a Scientist in CARE, IIT Delhi from 1977 to 1985 where he was involved in designing and implementing real-time DSP systems. For the last 27 years, he is involved in teaching and research in the areas of digital systems design, electronic design automation and embedded systems. He has supervised 8 Ph.D. students, 3 MSR students, 140 M.Tech/B.Tech projects and published nearly 80 conference and journal papers. Further, he has held visiting positions in universities in Canada, USA and Germany. At IIT Delhi, he has been the Philips Chair Professor, Head of the Department of Computer Science & Engineering and Dean of Post Graduate Studies & Research at IIT Delhi. Currently he is the Deputy Director (Faculty) at IIT Delhi. He has been associated with a number of initiatives to promote research at IIT Delhi.

Abstract

:

Power consumption in processors has become a major concern and clearly that has been one key factor behind growth of multi-core processors to achieve performance rather than single core with increased clock frequency. In this talk we would start by describing the processor power consumption issues as well as motivation for low power multi-core processors. We would also briefly trace the impact on power conumption as the processor architecture evolution mainly focussed on increasing performance. We would finally describe our recent research efforts focussed on multi-core power estimation.