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Jaypee Institute of Information Technology, Noida
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  • Dr. Kaushal Nigam
Assistant Professor (Senior Grade)
kaushal.nigam@jiit.ac.in

Qualification:  

  • Ph.D.  from IIIT Jabalpur, M.P.
  • M.Tech from MANIT Bhopal, M.P.        
  • B.Tech  from MMMUT, Gorakhpur, U.P.

Work Experience

7.5 Yrs (Teaching+Research)

Biography:  

Kaushal Nigam was born in Lakhimpur, Uttar Pradesh, India. He has completed his Ph.D.(VLSI Design) from Department of Electronics & Communication Engineering from Indian Institute of Information Technology, Jabalpur, M.P. in 2018. He did his M.Tech. in VLSI & Embedded System Design from Maulana Azad National Institute of Technology, Bhopal, M.P. in 2011. He has done his B.Tech in Electronics & Communication from Madan Mohan Malaviya University of Technology, Gorakhpur, U.P. in 2009.

Presently, he is an Assistant Professor in the Department of Electronics & Communication Engineering, Jaypee Institute of Information Technology, Noida, Uttar Pradesh, India.

Research Interest :

  • Modeling and Simulation of Semiconductor Device
  • FETs Based Biosensor
  • Strain Analysis
  • Ferroelectrics Based FETs

Publications:

SCI Journal Papers

 

  • S. Kumar, S. Singh, Kaushal Nigam, V.A. Tikkiwal and B.V. Chandan, “Dual-material Dual-Oxide Double-gate TFET for Improvement in DC Characteristics, Analog/RF and Linearity Performance”, Applied Physics A, vol. 125, no. 5, May. 2019 (Impact Factor: 1.604)
  • B.V. Chandan, Kaushal Nigam, and D. Sharma, “An Approach on Electrically Doped TFET for Suppression of Ambipolar and Improving RF Performance”,IET Circuits, Devices & Systems, Accepted Manuscript, Mar. 2019 (Impact Factor: 1.35)
  • B.V. Chandan, M. Gautami, Kaushal Nigam, D. Sharma, V.A. Tikkiwal, “A Novel Methodology to Suppress Ambipolarity and Improve the Electronic Characteristics of Polarity-based Electrically Doped Tunnel FET,” Applied Physics  A, vol. 128,  no. 81, pp. 1-7, Jan. 2019,(Impact Factor: 1.604)
  • B. V. Chandan, S. Dasari , Kaushal Nigam, S. Yadav, S. Pandey, D. Sharma, "Impact of Gate Material Engineering on ED-TFET for Improving DC/Analogue-RF/Linearity Performances,"IET Miro & Nano Lettes, vol. 13, no.12, pp.1653–1656, Dec. 2018 (Impact Factor: 0.841) 
  • B.V. Chandan, M. Gautami, Kaushal Nigam, D. Sharma, V.A. Tikkiwal, S. Yadav and S.Kumar, “Impact of a Metal-strip on a Polarity-based Electrically Doped TFET for Improvement of DC and Analog/RF Performance,”Journal of Computational Electronics, vol. 18, no. 1, pp 76-82, Nov.2018  (Impact Factor: 1.431)
  • B.V. Chandan, Kaushal Nigam, D. Sharma, and S. Pandey “Impact of Interface Trap Charges on Dopingless Tunnel FET for Enhancement of Linearity Characteristics”, Applied Physics-A (Springer), vol. 124, no. 7, pp. 503, Jul. 2018, (Impact Factor: 1.604
  • S. Gupta, D. Sharma, S. Yadav, Mohd. Aslam, D. S. Yadav, D. Soni, Kaushal Nigam, N. Sharma, “Examination of the Impingement of Interface Trap Charges on Heterogenous Gate Dielectric Dual Material Control Gate Tunnel FET for the Refinement of Device Reliability,”IET Micro Nano letter, (Accepted), Apr. 2018
  • B.V. Chandan, Kaushal Nigam, and D. Sharma “Junctionless Based Dielectric Modulated Electrically Doped Tunnel FET Based Biosensor for Label-free Detection”, IET Micro & Nano letters, (Accepted), Dec. 2017, (Impact Factor: 0.723)
  • Kaushal Nigam, P.N. Kondekar and D. Sharma,“DC Characteristics and Analog/RF Performance of Novel Polarity Control GaAs-Ge Based Tunnel Field Effect of Transistor,”Superlattices & Microstructures, Elsevier, vol. 92, pp. 224-231, Apr. 2016, (Impact Factor: 2.123)
  • Kaushal Nigam, P.N. Kondekar, D. Sharma and B. Ram Raad ,“A New Approach for Design and Investigation of Junctionless Tunnel FET using Electrically Doped Mechanism,”Superlattices & Microstructures, Elsevier, vol. 98, pp. 1-7, Oct. 2016, (Impact Factor: 2.123)
  • Kaushal Nigam, S. Pandey, P.N. Kondekar and D.Sharma,“Temperature Sensitivity Analysis of Polarity Controlled Electrostatically Doped Tunnel FieldEffect Transistor,”Superlattices & Microstructures, Elsevier, vol.  97, pp.598-605, Sep. 2016,  (Impact Factor: 2.123)
  • Kaushal Nigam, P.N. Kondekar and D. Sharma,“High Frequency Performance of Dual Metal Gate Vertical Tunnel Field Effect Transistor Based on Work Function Engineering,”IET Micro & Nano letters, vol. 11, no. 6,  pp. 319-322, Jun. 2016, (Impact Factor: 0.723)
  • Kaushal Nigam, P.N. Kondekar and D. Sharma,“Approach for Ambipolar Behaviour Suppression in Tunnel FET by Workfunction Engineering,”IET Micro & Nano letters, vol. 11, no. 8, pp. 460-464, Aug. 2016, (Impact Factor: 0.723)
  • Kaushal Nigam, S.Pandey, P.N. Kondekar, D.Sharma, M. Verma, and A. Gedam, “Performance Estimation of Polarity Controlled Electrostatically Doped Tunnel Field Effect Transistor,”IET Miro & Nano Letters, vol. 12, no. 4, pp. 239-244, Apr. 2017, (Impact Factor: 0.723)
  • Kaushal Nigam, S. Pandey, P.N. Kondekar, D. Sharma, and Pawan, “A Barrier Controlled Charge Plasma Based TFET with Gate Engineering for Ambipolar Suppression and RF/Linearity Performance Improvement,”IEEE Transactions on Electron Devices, vol. 64, no. 6, pp. 2751-2757,  Apr. 2017, (Impact Factor: 2.605)
  • Kaushal Nigam, S. Gupta, S. Pandey, D. Sharma, and P.N. Kondekar, “Controlling the Ambipolarity and Improvement of RF Performance using Gaussian Drain Doped TFET,” International Journal of Electronics, (Accepted) ,Oct. 2017, (Impact Factor: 0.729)
  • P.N. Kondekar, Kaushal Nigam, S. Pandey and D. Sharma,“Design and Analysis of Polarity Controlled Electrically Doped Tunnel FET with Bandgap Engineering for Analog/RF Applications,”IEEE Transactions on Electron Devices, vol. 64, no. 6, pp. 412-418, Feb. 2017, (Impact Factor: 2.605)
  • S. Gupta, Kaushal Nigam,S. Pandey, D. Sharma, P.N. Kondekar, and “Effect of Interface Trap Charges on Performance Variation of Heterogeneous Gate Dielectric Junctionless-TFETIEEE Transactions on Electron Devices, vol. 64, no. 11, pp. 4731-4737, Sep. 2017, (Impact Factor: 2.605)
  • P. Venkatesh, Kaushal Nigam, S. Pandey, D. Sharma, and P.N. Kondekar,“Impact of Interface Trap Charges on Reliability of Heterogeneous Gate DielectricElectrically Doped Tunnel FET,” IEEE Transactions on Material and Reliability Issue,vol. 17, no. 1, pp. 245-252,  Mar. 2017, (Impact Factor: 1.575)
  • B. Ram Raad, Kaushal Nigam, D. Sharma and P.N. Kondekar,“Dielectric and Workfunction Engineered TFET for Ambipolar Suppression and RF Per-formance Enhancement,”IET Electronic Letters, vol. 52, no. 9, pp. 770-772, Apr. 2016, (Impact Factor: 1.155)
  • B. Ram Raad, Kaushal Nigam, D. Sharma and P.N. Kondekar,“Performance Investigation of Band, Gate Material Work Function and Gate Dielectric Engineered TFET with Device Reliability Improvement,”Superlattices & Microstructures, Elsevier, vol. 94, pp. 138-146, Jun. 2016, (Impact Factor: 2.123)
  • P. Venkatesh, Kaushal Nigam, S. Pandey,  D. Sharma, and P.N. Kondekar “Assessment of Sensing Behavior of a Dielectrically Modulated Electrically Doped Tunnel FET based Biosensor for Label Free Detection,”Superlattices & Microstructures, Elsevier, vol. 109, pp. 470-479, Sep. 2017, (Impact Factor: 2.123)
  • D. Singh, S. Pandey, Kaushal Nigam, D. Sharma, D. S. Yadav and P.N.Kondekar,“A Charge Plasma Based Dielectric Modulated Junctionless TFET for Biosensor Label Free Detection,”IEEE Transactions on Electron Devices, vol. 64, no. 1, pp. 271-278, Jan. 2017, (Impact Factor: 2.605)
  • B. Ram Raad, D. Sharma, P.N. Kondekar, Kaushal Nigam, and D. S. Yadav,“Drain Work Function Engineered Doping-Less Charge Plasma TFET for Ambipolar Suppression and RF Performance Improvement: A Proposal Design, and Investigation,”IEEE Transactions on Electron Devices, vol.63, no.10, pp. 3950-3957, Oct. 2016, (Impact Factor: 2.605)
  • B. Ram Raad, D. Sharma, Kaushal Nigam, P.N. Kondekar, and,“Utility of IIIV Group Ternary Compound Semiconductor Materials for Unipolar Conduction in Tunnel Field-Effect Transistors,”Journal of Computational Electronics, Springer, vol. 16, no. 1, pp. 24-29,  Mar. 2017, (Impact Factor: 1.526)
  • D. Sharma, B. R. Raad, D. Yadav, P.N. Kondekar, and Kaushal Nigam,“2-D Potential, Electric Field and Drain Current Model of Source Pocket Hetero Gate Dielectric Triple Work Function Tunnel Field Effect Transistor,”IET Micro & Nano letters , vol. 12, no. 1,  pp. 11-16, Jan. 2017, (Impact Factor: 0.723)
  • B. Ram Raad, D. Sharma, Kaushal Nigamand P.N. Kondekar,“Physics Based Simulation Study of High Performance GaAsP-InGaA TFET,”IET Micro & Nano letters, vol. 11, no. 7, pp. 366-368, Jul. 2016, (Impact Factor: 0.723)
  • M. Verma, D.Sharma, S.Pandey, Kaushal Nigam, and P.N. Kondekar, Performance Comparison of Single and Dual Metal Dielectrically Modulated TFETs for the Application of Label Free Biosensor,”Superlattices & Microstructures, Elsevier, vol. 101, pp. 219-227, Jan. 2017, (Impact Factor: 2.123)
  • A. Gedam, S. Tricky, Kaushal Nigam, S. Pandey, D. Sharma, and P.N. Kondekar,“Investigation of Gate Material Engineering in Junctionless TFET to Overcome the Trade-off Between Ambipolarity and RF/linearity Metrics,” Superlattices & Microstructures, Elsevier, vol. 109,  pp. 307-315, Sep. 2017, (Impact Factor: 2.123)
  • B. Ram Raad, D. Sharma, P.N. Kondekar, Kaushal Nigam, and S. Baronia, “DC and Analog/RF Performance Optimization of Source Pocket Dual Work Function TFET, ”International Journal of Electronics, vol. 104, no. 12, pp. 1992-2006, Dec. 2017, (Impact Factor: 0.729)
  • B. Awadhiya, S. Pandey, Kaushal Nigam, S. Pandey, D. Sharma, and P.N. Kondekar, “ Effect of ITC's on Linearity and Distortion Performance of Junctionless Tunnel Field Effect Transistor,” Superlattices & Microstructures, Elsevier, (Accepted), Jun. 2017, (Impact Factor: 2.123)

International / National Conference papers

  • V. Mishra, N. Yadav,  Kaushal Nigam, B. Bansal, and R. Chauhan,  “Analysis of RSNM and WSNM of 6T SRAM cell using Ultra Thin Body FD-SOI MOSFET,”Advance in Signal Processing and Communication, pp. 619-627, 2019.

  • B.V. Chandan,Kaushal Nigam, S.Pandey, D. Sharma, and P.N. Kondekar, “Temperature Sensitivity Analysis on Analog/RF and Linearity metrics of Electrically Doped Tunnel FET,” Conference on Information and Communication Technology (CICT’17), pp.1-5, DOI: 10.1109/INFOCOMTECH.2017.8340625, 2017

  • S. Gupta, Kaushal Nigam, S. Pandey, D. Sharma, and P.N. Kondeka “Performance improvement of heterojunction double gate drain overlapped TFET using Gaussian doping” Energy Efficient Electronic Systems & Steep Transistors Workshop (E3S), 2017 Fifth Berkeley Symposium on, Berkeley, CA, USA, pp. 3,  DOI: 10.1109/E3S.2017.8246171, Jan. 2018
  • A. Gedam, S. Pandey, S. Yadav, Kaushal Nigam,  D. Sharma, and P. N. Kondekar, “ Realization of Junctionless TFET-Based Power Efficient 6T SRAM Memory Cell for Internet of Things ApplicationsProceedings of First International Conference on Smart System, Innovations and Computing, pp. 515-523, Jan. 2018
  • Kaushal Nigam, S. Pandey, P.N. Kondekar and D. Sharma, “Temperature Sensitivity Analysis of Polarity Controlled Electrically Doped Hetero-TFET,”pp.1-4, 12th conference on Ph.D. Research in Microelectronics and Electronics(PRIME)– 2016
  • S. Baronia, Kaushal Nigam, D. S. Yadav, Dheeraj Sharma, B. Ram Raad and PravinKondekar,“A Novel Approach of PNPN Dual Metal Double Gate Tunnel Field Effect Transistor for Improving DC Characteristics, ”IEEE internationalconference on advanced communication control and computing technologies, pp. 44-47, DOI: 10.1109/ICACCCT, 2016.
  • Sunil Pandey, P N Kondekar, Kaushal Nigam, and Dheeraj Sharma, “A 0.9V, 3.110.6 GHz CMOS LNA with high gain and wideband input match in 90 nm CMOS process, ” IEEE Asia Pacific Conference on Circuits and Systems(APCCAS), pp. 730-733, DOI: 10.1109/APCCAS.2016.7804079, 2016)

Reviewer in Journals: