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Atul Kumar Srivastava

Biography

Over twenty five years of teaching experience in reputed National Technical / Deemed Universities of India. Currently working as Assistant Professor in the department of Electronics and Communication Engineering, JIIT Sector-62 Campus since 2006.Before joining JIIT worked at Jawaharlal Nehru Technical University (JNTU), Hyderabad and ICFAI Tech Hyderabad for total period of three years. Worked with Uttar Pradesh Technical University (UPTU) now known as Dr. A P J Abdul Kalam Technical University, Uttar Pradesh, Lucknow for three years.

Received State merit scholarship for two years in 10+2 level. Obtained top rank in Uttar Pradesh State Combined Engineering Entrance Examination in 1994.Obtained B.Tech degree in Electronics Engineering from Lucknow University affiliated Government Engineering College, Institute of Engineering & Technology (IET), Lucknow in the year 1998. Obtained MS degree from Manipal University, Manipal, Udupi , Karnataka. Have authored many journal papers and presented numerous papers in national and International conferences. Have authored book on Digital Electronics published by Cengage publications. Guided seventeen M.Tech Thesis. Department M.Tech coordinator for eight years. CICE hub faculty advisor since inception till 2021.

Organised series of guest lectures on Smart Phones between 2008-2011 and industrial visit to ST microelectronics/ ST Ericsson in 2009/2010. Joint project with ST Erricsson on FM radio GUI on Android V4L2 Radio Interface using NDK in 2009-2010.

Research Highlights

VLSI Physical Design Automation: To analyze the process of transforming a circuit's logical representation (netlist) into a physical layout on a silicon chip, ready for manufacturing. This involves several automated steps to optimize for area, performance, power, and other design goals. 

High Level synthesis in Electronics Design Automation: To develop the process of converting a high-level description of a circuit (often written in C, C++, or SystemC) into a register transfer level (RTL) design.

Evolvable Hardware Design and Performance Analysis: Evolvable hardware (EHW) design uses evolutionary algorithms to design and optimize digital circuits. This approach allows for the creation of complex, adaptive hardware systems, particularly useful for embedded systems and applications requiring adaptability to changing environments.  

VLSI CAD Design, Technology and its applications:  is crucial for designing these chips efficiently, while the technology itself allows for the integration of millions or even billions of transistors onto a single chip. This field has wide-ranging applications, from consumer electronics to automotive systems and healthcare devices. 

To Understand the behaviour of solar cells based on a one-dimensional model, allowing for efficient analysis of various parameters. 

Areas of Interest
  • High Level synthesis in Electronics Design Automation
  • Evolvable Hardware Design and Performance Analysis
  • VLSI CAD Design, Technology and its applications
  • One-dimensional modelling of Solar Cell
Publications

INTERNATIONAL CONFERENCE PAPER

  • Srivastava, Atul Kumar; Srivastava, M.C,” A Combinatorial Digital Circuit With Evolutionary Algorithm For Evolvable Hardware Software Codesign”, International Conference on Power, Control and Embedded Systems (ICPCES), MNNIT 2010. IEEE Conference Publications. Digital Object Identifier: 1109/ICPCES.2010.5698690,Publication Year: 2010 , Page(s): 1 – 5.Indexed with SCOPUS.
  • Akshay Baid, Atul Kumar Srivastava,”Generating Test Patterns for Fault Detection in Combinational Circuits Using Genetic Algorithm”, Students Conference on Engineering and Systems (SCES 2013), MNNIT Allahabad. IEEE Conference Publications. Digital Object Identifier:1109/SCES.2013.6547506 ,Publication Year: 2013 , Page(s): 1 – 4. Indexed with SCOPUS.
  • Atul Kumar Srivastava, Srishti Madan, Sourabh Chaturvedi, Hariom Gupta,“Synthesis of Evolvable Hardware with Different Clustering Techniques”.5thInternational Conference on Computer Applications in Electrical Engineering Resent advances ( CERA-13), Dep’t of Electrical Engineering IIT Roorkee. Publication Year: Oct 2013, Page(s): 306-310.
  • Atul Kumar Srivastava, Srishti Madan “Evolvable Hardware: A Synthesis and Analysis Using Different Evolutionary Strategies” .3rd International Conference on Computational Intelligence and Information Technology – CIIT 2013, Mumbai,Elsevier Publication , ISBN 978-81-910691-6-3, . Page(s): 426 – 431.
  • Srivastava, A.K.,Sharma, “Evolvable Hardware Using Cluster Growth Along With Evolution Strategy,” Advanced Computing Conference - IACC 2014, Digital Object Identifier: 10.1109/IAdCC.2014.6779426 ,Publication Year: 2014 , Page(s): 802 – 806. Indexed with SCOPUS.
  • Atul K Srivastava, Hariom Gupta,”Cluster Growth Technique for Combinatorial Evolvable Digital Circuit”, 2014 Seventh International Conference on Contemporary Computation (IC3)2014.DOI: 10.1109/IC3.2014.6897189 Publication Year: 2014 , Page(s): 294 – 298. Indexed with SCOPUS.
  • Srivastava, A.K.; Gupta, A. ; Chaturvedi, S. ; Rastogi, V. , “Design and simulation of virtual reconfigurable circuit for a Fault Tolerant System”, Recent Advances and Innovations in Engineering (ICRAIE), 2014, DOI: 1109/ICRAIE.2014.6909277. Publication Year: 2014 , Page(s): 1 – 4. Indexed with SCOPUS.
  • Atul K Srivastava; Himanshu Shishodia; Himanshu“Circuit segmentation using GP in FPGA's technology mapping”2016 3rd International Conference on Computing for Sustainable Global Development (INDIACom), Year: 2016,Pages: 1947 – 1951. Indexed with SCOPUS.
  • Srivastava A.K., Tiwari S., Banerjee S. (2020) Application of Petri Net Model in High-Level Scheduling Algorithm. Advances in VLSI, Communication, and Signal Processing. Lecture Notes in Electrical Engineering, vol 587. Springer, Singapore.
  • Sharma and A. K. Srivastava, "A Study on Thickness Optimization and Variation in Lead Free Perovskite CH3NH3SnBr3," 2025 10th International Conference on Signal Processing and Communication (ICSC), Noida, India, 2025, pp. 731-736, doi: 10.1109/ICSC64553.2025.10967599.

JOURNAL PAPER

  • Atul Kumar Srivastava, Himanshu Shishodia and Himanshu”Analysis of Different Selection Scheme for Scheduling in High-Level Synthesis” International Journal of Control Theory and Applications, Vol 9(20), 2016, pp. 123-136. Indexed with SCOPUS.
  • Atul K. Srivastava“Analysis of Pattern Generation and Randomness for LFSRs” International Journal of Control Theory and Applications, Vol 9(19) 2016, pp. 9273-9279. Indexed with SCOPUS.
  • Saurabh Chaturvedi, Atul K. Srivastava, Nishil Bisht and Pranati Khanna, “A Novel Edge Detection Based Technique for Fingerprint Recognition”. International Journal of Applied Engineering Research (IJAER) Volume 9, Number 19 (2014) pp. 5847-5856. Indexed with SCOPUS.
  • Atul Kumar Srivastava, Hariom Gupta,”Performance Analysis of Combinatorial Digital Circuit Evolution with Cluster Growth Technique”.World Applied Science Journal 32 (7): 1219-1225, 2014 ISSN 1818-4952 IDOSI Publication, DOI: 10.5829/idosi.wasj.2014.32.07.252 Indexed with SCOPUS.
  • Atul K Srivastava, S. Chaturvedi, Hariom Gupta,” On Xilinx Design Language Format for Reconfigurable Evolvable Hardware.”International Journal of Applied Engineering Research (IJAER) 9 (11): pages. 1591-1602, 2014 ISSN 0973-4562, Research India Publication, Indexed with SCOPUS.
  • Atul Kumar Srivastava,”Novel Crossover for Evolvable Hardware”,World Applied Science Journal 21 (10): 1408-1414, 2013 ISSN 1818-4952 IDOSI Publication, DOI: 10.5829/idosi.wasj.2013.21.10.1754 Indexed with SCOPUS.
  • Karan Kumar, Aditya Jain, and Atul Kumar Srivastava“FPGA Implementation of Image Enhancement Techniques,” Proc. of SPIE Vol. 7502 750208-7, September 2011. doi:10.1117/12.837179.
  • Sachin Sharma, Gaurav Chitranshi, Basanta Mahato, Atul Kumar Srivastava,Balvinder Pal Singh ,”Control Of Home-Appliances Through IR Interface Using Web (GPRS) Enabled Mobile Phones”, International Journal Of Advanced Engineering Sciences And Technologies, 2011,Volume No.6, Issue No. 2, 242-245
  • Atul Srivastava, Vijay Khare, “Evolutionary Design and Fitness Landscapes of Digital Circuits using Genetic Algorithm“,WSEAS Transactions On Advances In Engineering Education DOI: 10.37394/232010.2025.22.10, E-ISSN: 2224-3410, Volume 22, 2025.
  • Atul Srivastava1, Vijay Khare2, Ramit Kumar3,”Analysis of Power Minimization for Modified Force Directed Scheduling and Integer Linear Programming”, International Journal of Electrical Engineering and Computer Science DOI: 10.37394/232027.2025.7.11, E-ISSN: 2769-2507, Volume 7, 2025.