B.Tech (Electronics Engg) MS(VLSI CAD)
Over 18 years of teaching experience in reputed National Technical / Deemed Universities of India. Currently working as Assistant Professor in the department of Electronics and Communication Engineering, JIIT, Noida since 2006.Before joining JIIT worked at Jawaharlal Nehru Technical University (JNTU), Hyderabad and ICFAI Tech Hyderabad for total period of three years. Also worked with Uttar Pradesh Technical University (UPTU) now known as GautamBuddh Technical University, Lucknow for three years. Completed B.Tech in Electronics Engineering from Lucknow University affiliated Government Engineering College, Institute of Engineering & Technology (IET), Lucknow. MS from ManipalUniversity ,Manipal , Karnataka. Have authored many journal papers and presented numerous papers in national and International conferences. Also have authored a book on Digital Electronics published by Cengage publications. Received State merit scholarship for two years in 10+2 level. Obtained National level top rank in State Combined Engineering Entrance Examination.
High Level synthesis in Electronics Design Automation. Evolvable Hardware Design and Performace Analysis, VLSI Design, Technology and its applications.
INTERNATIONAL CONFERENCE PAPER
- Srivastava A.K., Tiwari S., Banerjee S. (2020) Application of Petri Net Model in High-Level Scheduling Algorithm. In: Dutta D., Kar H., Kumar C., Bhadauria V. (eds) Advances in VLSI, Communication, and Signal Processing. Lecture Notes in Electrical Engineering, vol 587. Springer, Singapore.
- Srivastava, Atul Kumar; Srivastava, M.C,” A Combinatorial Digital Circuit With Evolutionary Algorithm For Evolvable Hardware Software Codesign”, International Conference on Power, Control and Embedded Systems (ICPCES), MNNIT 2010. IEEE Conference Publications. Digital Object Identifier: 10.1109/ICPCES.2010.5698690,Publication Year: 2010 , Page(s): 1 – 5.Indexed with SCOPUS.
- Akshay Baid, Atul Kumar Srivastava,”Generating Test Patterns for Fault Detection in Combinational Circuits Using Genetic Algorithm”, Students Conference on Engineering and Systems (SCES 2013), MNNIT Allahabad. IEEE Conference Publications. Digital Object Identifier:10.1109/SCES.2013.6547506 ,Publication Year: 2013 , Page(s): 1 – 4. Indexed with SCOPUS.
- Atul Kumar Srivastava, Srishti Madan, Sourabh Chaturvedi, Hariom Gupta, “Synthesis of Evolvable Hardware with Different Clustering Techniques”.5th International Conference on Computer Applications in Electrical Engineering Resent advances ( CERA-13), Dep’t of Electrical Engineering IIT Roorkee. Publication Year: Oct 2013 , Page(s): 306-310.
- Atul Kumar Srivastava , Srishti Madan “Evolvable Hardware: A Synthesis and Analysis Using Different Evolutionary Strategies” .3rd International Conference on Computational Intelligence and Information Technology – CIIT 2013, Mumbai,Elsevier Publication , ISBN 978-81-910691-6-3, . Page(s): 426 – 431.
- Srivastava, A.K., Sharma, “Evolvable Hardware Using Cluster Growth Along With Evolution Strategy,” Advanced Computing Conference - IACC 2014, Digital Object Identifier: 10.1109/IAdCC.2014.6779426 ,Publication Year: 2014 , Page(s): 802 – 806.Indexed with SCOPUS.
- Atul K Srivastava, Hariom Gupta,”Cluster Growth Technique for Combinatorial Evolvable Digital Circuit”, 2014 Seventh International Conference on Contemporary Computation (IC3)2014.DOI: 10.1109/IC3.2014.6897189 Publication Year: 2014 , Page(s): 294 – 298. Indexed with SCOPUS.
- Srivastava, A.K. ; Gupta, A. ; Chaturvedi, S. ; Rastogi, V. , “Design and simulation of virtual reconfigurable circuit for a Fault Tolerant System”, Recent Advances and Innovations in Engineering (ICRAIE), 2014, DOI: 10.1109/ICRAIE.2014.6909277. Publication Year: 2014 , Page(s): 1 – 4. Indexed with SCOPUS.
- Atul K Srivastava; Himanshu Shishodia; Himanshu“Circuit segmentation using GP in FPGA's technology mapping” 2016 3rd International Conference on Computing for Sustainable Global Development (INDIACom), Year: 2016,Pages: 1947 – 1951. Indexed with SCOPUS
- Atul Kumar Srivastava, Himanshu Shishodia and Himanshu”Analysis of Different Selection Scheme for Scheduling in High-Level Synthesis” International Journal of Control Theory and Applications, Vol 9(20), 2016, pp. 123-136. Indexed with SCOPUS.
- Atul K. Srivastava “Analysis of Pattern Generation and Randomness for LFSRs” International Journal of Control Theory and Applications, Vol 9(19) 2016, pp. 9273-9279. Indexed with SCOPUS.
- Saurabh Chaturvedi, Atul K. Srivastava, Nishil Bisht and Pranati Khanna, “ A Novel Edge Detection Based Technique for Fingerprint Recognition”. International Journal of Applied Engineering Research (IJAER) Volume 9, Number 19 (2014) pp. 5847-5856. Indexed with SCOPUS.
- Atul Kumar Srivastava, Hariom Gupta,”Performance Analysis of Combinatorial Digital Circuit Evolution with Cluster Growth Technique”.World Applied Science Journal 32 (7): 1219-1225, 2014 ISSN 1818-4952 IDOSI Publication, DOI: 10.5829/idosi.wasj.2014.32.07.252 Indexed with SCOPUS.
- Atul K Srivastava, S. Chaturvedi, Hariom Gupta,” On Xilinx Design Language Format for Reconfigurable Evolvable Hardware.”International Journal of Applied Engineering Research (IJAER) 9 (11): pages. 1591-1602, 2014 ISSN 0973-4562, Research India Publication, Indexed with SCOPUS.
- Atul Kumar Srivastava ,”Novel Crossover for Evolvable Hardware”,World Applied Science Journal 21 (10): 1408-1414, 2013 ISSN 1818-4952 IDOSI Publication, DOI: 10.5829/idosi. wasj.2013.21.10.1754 Indexed with SCOPUS.
- Karan Kumar, Aditya Jain, and Atul Kumar Srivastava “FPGA Implementation of Image Enhancement Techniques,” Proc. of SPIE Vol. 7502 750208-7, September 2011. doi:10.1117/12.837179.
- Sachin Sharma, Gaurav Chitranshi, Basanta Mahato, Atul Kumar Srivastava,Balvinder Pal Singh ,”Control Of Home-Appliances Through IR Interface Using Web (GPRS) Enabled Mobile Phones”, International Journal Of Advanced Engineering Sciences And Technologies, 2011,Volume No.6, Issue No. 2, 242-245
Professional Projects / Professional Achievements
- Mentoring of Engineering Teachers by INAE Fellows: Selected and mentored by Dr. Aloknath De, Director and Country Manager, ST Ericson India Pvt Ltd, Greater Noida for two months during May-July 2010.
- Implementation of Cyclic Codes using VHDL: The project was done with DRDL Hyderabad in 2004-2005.
- Design and Development of Data Transfer Unit: The Project was accomplished with Bharat Dynamics Limited, Hyderabad in 2004-05.
- Developing an Error Correcting Aviation System: Project was done with Airport Authority of India, Hyderabad in 2005-06.
- Implementation of Fast Fourier Transform: Project done with Sandeepani, Hyderabad in 2005-06.
- Implementation of Ethernet Mac Layer in Verilog: Project was a done with ECIL, Hyderabad in 2005-06.
- AVLSI Architecture for motion compensation in H.264/AVC HDTV decoder: JIITU NOIDA in 2006-2007.
- A VLSI architecture of MAC using LRNS and 1-D DCT: JIIT University NOIDA. 2007-08.
- FPGA Implementation of Image Enhancement Techniques : JIIT University NOIDA 2008-09.
- FM radio GUI on Android V4L2 Radio Interface using NDK: JIIT NOIDA 2009-10, support provided by ST Ericson India Pvt Ltd, Greated Noida.
- Control of Home-Appliances through IR interface using web (GPRS) enabled Mobile Phones: JIIT NOIDA 20010-11 , support provided by ST Ericson India Pvt Ltd , Greated Noida.
Authors:Prof. M C Srivastava, Atul Kumar Srivastava
Title: Digital Electronics an HDL Based Approach
Publisher: Cengage publications(2011)