Dr. Vimal Kumar Mishra

Education

1. B.Tech., Electronics & Communication Engineering, Uttar Pradesh Technical University 2009.
2. M.Tech., Microelectronics and Embedded Technology, Jaypee Institute of Information Technology (JIIT), Noida, 2012.
3. Ph.D., Madan Mohan Malaviya University of Technology, AKTU, Lucknow, 2017

Biography

1. Assistant Professor, ECE Department, JIIT, Noida (July 2017 – Present)
2. Teaching cum Research Fellow, Department of ECE, MMMUT, Gorakhpur (June 2013 – March 2017)
3. Contractual Faculty, Department of ECE, MMMEC, Gorakhpur (July 2012 – June 2013)

Interest Area(s)

1. Device Modelling and Simulation: MOSFET, PD-SOI MOSFET, FD-SOI MOSFET, FinFET, and Junctionless Transistor
2. Digital Circuit: SRAM Cell, NAND and NOR circuits

Publications

International Journals

• Nitu Rao and Vimal Kumar Mishra, “Photoelectric Characterization of Intended Source UTBB 1 T FDSOI Based Image Sensor” Silicon, Springer, pp 1-10, 2021 (SCI, IF-2.67)
• VK Mishra, S Pandey, NA Srivastava and RK Chauhan, “A Compact Analytical Drain Current Model of Fully Depleted SOI MOSFETs with Lightly Doped N-underneath the N+ Source Region” Silicon, Springer, vol.13 pp. 1359-1365, 2021 (SCI, IF-2.67)
• A Agrawal, VK Mishra, A Gupta and B Bansal, “Performance analysis of beam forming aided uncorrelated mm-Wave MIMO system for IEEE 802.15. 3c standard” Physical Communication, vol. 41, pp. 101-114, 2020 (SCI, IF-1.8)
• A Gupta, B Bansal, VK Mishra and A Agrawal, “Miniaturised tri‐band rhombus‐shaped metamaterial‐inspired antenna with gain enhancement using complementary closed ring resonators” IET Microwaves, Antennas & Propagation, 14 (2), 185-193, 2020 (SCI, IF-1.97)
• Vimal Kumar Mishra, Bajrang Bansal, Ashish Gupta, Anand Agrawal, “Induction of Buried Oxide Layer in Substrate FD-SOI MOSFET for Improving the Digital and Analog Performance,” Silicon, Springer, vol-12, pp 2241-2249, 2020 (SCI, IF-2.67)
• Vimal Kumar Mishra, Nitu Rao, “Electrostatic Investigation of Intended Source Drain Ultra Thin Body FD-SOI MOSFET,” Silicon, Springer, vol. 12, pp 2819-2827, 2020 (SCI, IF-2.67)
• Bajrang Bansal, Sanjay Soni,Vimal Kumar Mishra, Ashish Gupta, and Anand Agrawal, “A Novel Heuristic Time-Domain Diffraction Model for UWB Diffraction By Lossy Wedges and Buildings,” Physical Communication, Elsevier, vol. 34, pp. 80-89, June 2019. (SCI, IF-2.67)
• Vimal Kumar Mishra and R. K. Chauhan, “Efficient Layout Design of Junctionless Transistor Based 6-T SRAM Cell Using SOI Technology”, ECS Journal of Solid State Science and Technology, IOP, vol. 7 (9), pp. 456-461, 2018 (SCI, IF-2.07)
• Vimal Kumar Mishraand R. K. Chauhan, “Area efficient layout design of CMOS circuit for high-density ICs,” International Journal of Electronics, Taylor Francis, vol-105 (1), pp 73-87, 2018 (SCI, IF-1.33)
• Vimal Kumar Mishraand R. K. Chauhan, “Performance Analysis of Modified Source and TDBC based Fully-Depleted SOI MOSFET for Low Power Digital Applications” Journal of Nanoelectronics and Optoelectronics, American Scientific Publishers, vol-12(1), pp. 59-66, 2017 (SCI, IF-1.06)
• Vimal Kumar Mishraand R. K. Chauhan, “Area Efficient Layout design of CMOS Device for Digital Circuit Applications” Journal of Nanoengineering and Nanomanufacturing, American Scientific Publishers, vol-6, issue 3,  pp. 188-192, 2016.
• Vimal Kumar Mishraand R. K. Chauhan,“Performance Enhancement of MOS Transistor using Ge- Nano-wire Hetero junction Interband Tunnel Diode”, vol.10 issue 15, pp-32959-32963, Sept.2015 International Journal of Applied Engineering Research. (Scopus).

International Conference

• N. Rao and V. Mishra, "Light Dependency of Intended Source UTBB FDSOI based Photodetector," 7^th IEEE International Conference on Signal Processing and Communication (ICSC), pp. 252-255, 2021. (Accepted)
• V. Saxena, Y. Gupta, S. Kumar, N. Rao and V. Mishra, "Study and Analysis of Modified Junction-less SOI MOSFET at 18nm Gate Length," 6^th IEEE International Conference on Signal Processing and Communication (ICSC), pp. 252-255, 2020. (IEEE-Xplore)
• V. Mishra, B. Bansal and R. K. Chauhan, "Impact of BOX Thickness Scaling on Channel Modulated Electric Field of DC-EFM FD-SOI MOSFET," 2019 International Conference on Signal Processing and Communication (ICSC), pp. 307-310, 2019. (IEEE-Xplore)
• Bajrang Bansal, Sanjay Soni, Vimal Kumar Mishra, Nitin Jain, “A new time-domain diffraction coefficient for dielectric obstacles,” International conference on Signal Processing, VLSI and Communication Engineering 2019 (ICSPVCE-2019), Delhi, India, 2019. (IEEE-Xplore)
• B. Bansal, V. K. Mishra, S. Soni and N. Jain, "Deterministic Millimeter-Wave Channel Modeling Based on Ray-Tracing in Urban Scenario," 2019 International Conference on Signal Processing and Communication (ICSC), pp. 59-63,2019. (IEEE-Xplore)
• B. Bansal, S. Soni, N. Jain and V. K. Mishra, "An Analytical Time-Domain Channel Characterization of UWB Propagation in Railway Environment," 2018 International Conference on Computing, Power and Communication Technologies (GUCON), pp. 590-594, 2018. (IEEE-Xplore)
• Vimal Kumar Mishraand R. K. Chauhan, “Comparative Analysis of Si, SiGe and Ge bulk Tri Gate n-FinFET for Enhanced Drive Current and Low Power Dissipation” IEEE International Conference on Recent Advances in Information Technology held in ISM Dhanbad, INDIA, pp, 242-346, 3-5 March 2016 . [ISBN:9781479985784](IEEE-Xplore, DBLP, Scopus)
• Nilesh Srivastav, Vimal Kumar Mishra and R. K. Chauhan, “Analytical Modelling of Surface Potential of Modified Source FD-SOI MOSFET” IEEE international Conference on Emerging Trends in Communication Technologies held in Utrakhand , INDIA, 5-6 Nov 2016 . [ISBN:9781479985784](IEEE-Xplore)
• Sandeep Tripathi, Vimal Kumar Mishra and R. K. Chauhan, “Effect of Rare Earth Material on FD-SOI MOSFET” IEEE international Conference on Emerging Trends in Communication Technologies held in Utrakhand, India, 19-20 Nov 2016, pp. 1-4, 2016. [ISBN:9781479985784](IEEE-Xplore)
• ShwetaYadav, Vimal Kumar Mishra and R. K. Chauhan, “Performance analysis of  Double gate junctionless Transistors”, Proceedings of IEEE International Conference on Emerging Trends in Electrical, Electronics & Sustainable Energy Systems (ICETEESES-16) held at 11-12 March 2016 KNIT Sultanpur, Vol-II, pp. 264-267, 2016[ [ISBN: 978-93-85777-32-5] (IEEE-Xplore)
• Mitali Johri, Vimal Kumar Mishra and R. K. Chauhan, “Fast and Power efficient Level Shifter Using FD SOI MOSFETS and Widlar Current Mirror Configuration”, Proceedings of IEEE International Conference on Emerging Trends in Electrical, Electronics & Sustainable Energy Systems (ICETEESES-16) held at 11-12 March 2016 KNIT Sultanpur, Vol-II, pp. 272-275, 2016[ [ISBN: 978-93-85777-32-5] [IEEE-Xplore]
• Narendra Yadav, Vimal Kumar Mishra and R. K. Chauhan, “Design of  one transistor SRAM cell for low power consumption”, Proceedings of IEEE International Conference on Emerging Trends in Electrical, Electronics & Sustainable Energy Systems (ICETEESES-16) held at 11-12 March 2016 KNIT Sultanpur,Vol-II, pp. 255-258, 2016 [ISBN: 978-93-85777-32-5] [IEEE-Xplore]
• Shweta Pandey, Vimal Kumar Mishra and R. K. Chauhan, “Performance analysis of low voltage level shifter using FD-SOI MOSFET for low power dissipation”, Proceedings of IEEE International Conference on Emerging Trends in Electrical, Electronics & Sustainable Energy Systems (ICETEESES-16) held at 11-12 March 2016 KNIT Sultanpur, Vol-II, pp. 268-271, 2016 [ISBN: 978-93-85777-32-5] [IEEE-Xplore]
• Vimal Kumar Mishraand R. K. Chauhan, “Impact of Ge Substrate on Drain Current of Trigate N-FinFET” IEEE International Conference on ICACCI-2014, held at Greater Noida, India between 24-27 September 2014, pp.1976-1980, 2014 [ISBN:9781479930784] (IEEE-Xplore, Scopus, DBLP)
• Vimal Kumar Mishraand R. K. Chauhan, “Comparison of Multiple Fin Heights for Increasing Drain Current in N-FinFET” IEEE International Conference on Circuits, Controls and Communications (CCUBE),held at Bangluru, India between 27-28 December 2013,pp.1-5. ISBN: 9781479915996 (IEEE-Xplore, Scopus)

Patent File and Published

•  Vimal Kumar Mishraand R. K. Chauhan, “Tapered body reduced source (TBRS) CMOS Structure”, Intellectual Property office New Delhi, 2015.

Granted: Indian Patent No. 386182

• Vimal Kumar Mishraand R. K. Chauhan, “Layout Design of Junctionless transistor based 6-T SRAM cell using SOI Technology”, Intellectual Property office New Delhi, August 2016.

Published Patent in Journal- Vimal Kumar Mishra and Rajeev kumar Chauhan, “Layout Design of Junctionless transistor based 6-T SRAM cell using SOI Technology” Official Journal of patent office, Publication of the patent office, India, Issue no. 34/2016, p-58858, August 2016.

• Vimal Kumar Mishra, Abhinav Chaudhary, Shivangi, Vaibhav Mishra, “Rice Planting Robot”, Intellectual Property office New Delhi, Feb 2021.

Book Chapters

• Vimal Kumar Mishra, Narendra Yadav, Kushal Nigam, Bajrang Bansal and R. K. Chauhan, “Analysis of RSNM and WSNM of 6T SRAM cell using Ultra Thin Body FD-SOI MOSFET”, Lecture Notes in Electrical Engineering, Springer Advances in Intelligent Systems and Computing, vol. 526, pp. 619-627, 2019.  [ISBN No. 978-981-13-2552-6] (Scopus)
• Narendra Yadav, Vimal Kumar Mishra and R. K. Chauhan, “Analysis of N+N- Epi-Source Asymmetric Double Gate FD-SOI MOSFET”, Intelligent Engineering Informatics, Advances in Intelligent Systems and Computing,Springer, vol. 695, pp. 541-549, 2018.  [ISBN No. 978-981-10-7565-0] (Scopus)
• Vimal Kumar Mishraand R. K. Chauhan, “Performance Analysis of Fully Depleted SOI Tapered Body Reduced Source (FD-SOI TBRS) MOSFET for Low Power Digital Applications”, Frontiers of Intelligent Computing: Theory and applications (FICTA), Springer Advances in Intelligent Systems and Computing,vol. 516, pp. 361-368, 2017. [ISBN No. 978-981-10-3155-7] (Scopus)
• Vimal Kumar Mishraand R. K. Chauhan, “Performance Analysis of Fully Depleted Ultra Thin-Body (FD UTB SOI) MOSFET based CMOS Inverter Circuit for Low Power Digital Applications”, Information Systems Design And Intelligent Applications, Advances in Intelligent Systems and Computing,Springer, vol. 434, pp. 375-382, 2016. [ISBN No. 978-81-322-2750-2] (Scopus)

• Reviewer in IEEE Embedded Letters, International Journal of Electronics (Taylor Francis), Thin Film (Elsevier), ECS Journal of Solid State Science and Technology, and Advances in Electrical and Electronics Engineering etc.
• Member IEEE
• Reviewer in 6^th International conference on Soft Computing: Theories and Applications organized at IIIT Kota (SoCTA -2021)
• Reviewer in IEEE International Conference on Signal Processing, VLSI and Communication Engineering 2019 (ICSPVCE-2019).
• Reviewer and member of Technical review committee in IEEE International Conference on Signal Processing and Communication (ICSC-2019)
• Reviewer and member of Technical review committee in International Conference on Signal Processing and Communication (ICSC-2018) organised by Springer AISC series.
• Reviewer and member of Technical review committee in International Conference on Information system design and intelligent application (INDIA-2016) organised by Springer AISC series.
• Reviewer and member of Technical review committee in ICDECT-2016, India-2016 organised by Springer AISC series.
• Reviewer and member of Technical review committee in International Conference in IEEE International Conference on Emerging Trends in Communication Technologies (ICETCT-2016).
• Reviewer and member of Technical review committee of National Conference in Recent Advancement in Communication Engineering and Microelectronics (RACEM-2015 and 2016).

• FDP on "Silicon Photonics: Future of Integrated Circuits" from 20-24^th December 2021 organized by  AICTE Training And Learning (ATAL) at VNIT Nagpur.
•  Workshop on “CAD Tools for VLSI and Smart Systems” organized by the Department of Electronics and Communication Engineering, Jaypee Institute of Information Technology, Noida from 07^th – 14^th October 2021.
• FDP on “Recent Trends in Photonic Technology” from 28^th December 2020 to 2^nd January 2021 organized by Jaypee Institute of Information Technology, Noida
• FDP on “Technology Computer Aided Desogn: Simulation for VLSI Devices, Circuits and Systems” from 20-25^th July 2020 organized by Jaypee Institute of Information Technology, Noida
• Workshop on “AI and IoT: Lead the Age of Sensor Technology” from 17-18 December, 2018 organized by Department of Electronics and Communication Engineering, JIIT Noida.
• Workshop on “Design and Simulation of Microwave Devices and Circuits” from 7-8 September, 2018 organized by Department of Electronics and Communication Engineering, JIIT Noida.
• International Conference on International Conference on Frontiers of Intelligent Computing: Theory and applications (FICTA) from 16^th -17^th September 2016 organised by Springer at Odissa.
• 1 week workshop on “Analog Integrated Circuit and Embedded System” organized by Texas Instrumentation from 7^th June to 12^th June 2016.
• International Conference Information Systems Design and Intelligent Applications from 8^th -9^th January 2016 organised by Springer at Vishakhapatnam.
• National Conference on Recent Advancements in Chemical and Materials Science (NCRACMS) 23-24 February, 2015 at MMMUT, Gorakhpur
• National Workshop on Recent Advancement in Communication Engineering and Microelectronics (RACEM) 27-28 March, 2015 at MMMUT, Gorakhpur
• IEEE International Conference on ICACCI-2014, between 24-27 September 2014 at Galgotia University, Greater Noida, India
• National Conference on Advances in Computer Communication & Embedded System (ACCES-II, 2014), April 2014 at MMMUT Gorakhpur
• IEEE International Conference on Circuits, Controls and Communications CCUBE, from 27-28 December 2013,at R.N.S. Institute of Technology, Bengluru.
• National Conference on Emerging Trends in Intelligent Computing and Communication (EICC 2012) ISBN: 9788175157262 APRIL 13-14, 2012 at Galgotia University, Greater Noida.
• 1 weekFaculty Development Program on “Recent Trends in Signal Processing, Microelectronics and Microwaves” during 5th to 11th July, 2018 organized by Department of Electronics and Communication Engineering, JIIT Noida.
• 1 week Short term course on “Microwave Devices and Technique” organised by Electronics and Communication Engineering Department at MMMUT, Gorakhpur from 6-11 July 2016.
• 1 week Short term course on “Modeling, Simulation and Characterization of Nano-Transistors” organised by Electrical Department at IIT Kanpur from 26-30 October 2015.
• 1 week short term course on “VLSI design” organised by NITTTR Chandigarh at MMMUT, Gorakhpur from 5^th -9^th October 2015.
• 1 week short term course on “Cloud Computng” organised by NITTTR Chandigarh at MMMUT, Gorakhpur from 15^th -19^th October 2015.

• Technical review committee of National Conference in Recent Advancement in Communication Engineering and Microelectronics (RACEM-2015 and 2016).