Dr. Divya Kaushik

Biography

Dr. Divya Kaushik, joined Electronics and Communication Department at JIIT, Noida in 2023 as Assistant Professor (senior grade). She has published 5 journal papers and two conferences. She has four years of teaching experience.

Education

• Ph.D. from Indian Institute of Technology, Delhi (IITD), 2023. Title of her thesis is “On-chip learning in a spintronics-based hardware neural network: A device-circuit-system co-study.”
• MTech from National Institute of Technology (NIT), Kurukshetra in Embedded Systems, 2015. Thesis title - First-principles study of spin transport in Fe-SiCNT-Fe magnetic tunnel junction.
• BTech from Kurukshetra University, Kurukshetra (KUK) with ECE specification.

Work Experience

• Guest faculty, Netaji Subhas Institute of Technology (NSIT), now Netaji Subhas University of Technology (NSUT), 2015 – 2017.

• Lecturer, Modern Institute of Engineering and Technology (MIET), Kurukshetra (KUK affiliated college), 2011 – 2013.

Award

She won the American Institute of Physics’ Advances in Magnetism Award for one of her papers (Comparing domain wall synapse with other non-volatile memory devices for on-chip learning in analog hardware neural network) in the year 2020 (best paper award). The paper was presented at Magnetism and Magnetic Materials (MMM) conference held in Las Vegas, US.

Research Interests

Spintronics, Machine Learning, Deep Learning, Neuromorphic Computing.

Publications

• VB Desai, D Kaushik, J Sharda, D Bhowmik, “On-chip learning of a domain-wall-synapse-crossbar-array-based convolutional neural network.” (2022) Neuromorphic Computing and Engineering 2 (2), 024006.
• D Kaushik, J Sharda, D Bhowmik, “Synapse cell optimization and back-propagation algorithm implementation in a domain wall synapse-based crossbar neural network for scalable on-chip learning.” (2020) Nanotechnology 31 (36), 364004.
• D Kaushik, U Singh, U Sahu, I Sreedevi, D Bhowmik, “Comparing domain wall synapse with other nonvolatile memory devices for on-chip learning in analog hardware neural network.” (2020) AIP Advances 10 (2).
• Debanjan Bhowmik, Utkarsh Saxena, Apoorv Dankar, Anand Verma, Divya Kaushik, Shouri Chatterjee, Utkarsh Singh, “On-chip learning for domain wall synapse based fully connected neural network.” (2019) Journal of Magnetism and Magnetic Materials 489, 165434.
• N Dey, J Sharda, U Saxena, D Kaushik, U Singh, D Bhowmik, “On-chip learning in a conventional silicon MOSFET based Analog Hardware Neural Network.” (2019) IEEE Biomedical Circuits and Systems Conference (BioCAS), 1-4.
• U Saxena, D Kaushik, M Bansal, U Sahu, D Bhowmik, “Low-energy implementation of feed-forward neural network with back-propagation algorithm using a spin-orbit torque driven skyrmionic device.” (2018) IEEE Transactions on Magnetics 54 (11), 1-5.
• S Choudhary, D Kaushik, “Understanding the effect of vacancy defects on spin transport in CrO2–graphene–CrO2 magnetic tunnel junction” (2015) Modern Physics Letters B 30 (09), 1650102.