"NIRF (MHRD) Rankings 2017: JIIT has achieved an All India Rank of 54 in Engineering Category, better than some NIT's and new IIT's"

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  • Dr. Shamim Akhter
Assistant Professor (Senior Grade)
shamim.akhter@jiit.ac.in

Education

Ph. D (JIIT, Noida), M.Tech (IIT Delhi), B. Tech(A.M.U)

Biography

Shamim Akhter was born at Chittaranjan, West Bengal, India on January 15, 1979. He received B.Tech degree from ZHCET, AMU(June 2001), M.Tech degree from IIT Delhi (Dec 2002) and Ph.D degree from Jaypee Institute of Information Technology, Noida, India(March 2015). He joined Jaypee Institute of Information Technology, Noida, in April 2003 as a Lecturer. Since then he is engaged in teaching, research and development in the field of VLSI digital circuits design. He has published research papers in reputed International Journals. Besides he has also published papers in International Conferences in India and abroad. Presently he is Assistant Professor in the Department of Electronics and Communication Engineering, Jaypee Institute of Information Technology, Sector 62, Noida.

Interest Area(s)

VLSI Circuit and System Design, VLSI Signal Processing, HDL design, FPGA

Experience: More than 16 years (teaching + research)

Publications

Book Published:

Shamim Akhter: Digital Hardware Design, University Science Press, 2008 (ISBN 10: 8131804356 ISBN 13: 9788131804353)

Shamim Akhter: Fundamentals of Digital Systems, Vikas Publication House Pvt Ltd, 2009.

Chapter 1 in “Computer Organization and Architecture” for Institute of Distance and Open learning, University of Mumbai , Vikas Publication House Pvt Ltd, 2013.

Shamim Akhter and Tanuj Chauhan: Basic Electronics Engineering, Pearson, 2014.

Chapter 3 in “Discrete Mathematics” for Nalanda Open University , Vikas Publication House Pvt Ltd, 2016

Shamim Akhter, Electronics Engineering, Kiran Education Services, Aug-Sep 2019 (Under Press)

International Journals:

  • S. Akhter, V. Karwal, and R. C. Jain, “Improved Algorithm for ODCT Computation of a Running Data Sequence,” Journal of Electrical and Computer Engineering, vol. 2012, Article ID 879626, 10 pages, 2012. doi:10.1155/2012/879626.[Indexed in SCOPUS]
  • S. Akhter, V. Karwal, and R. C. Jain “Fast Windowed Update Algorithm for ODCT Computation,” International Journal of Electronics Letters, Taylor & Francis, doi:10.1080/21681724.2014.880989, vol. 2, no. 2, 2014. [Indexed in SCOPUS]
  • S.Akhter and S. Chaturvedi, “A High Speed 14 Transistor Full Adder Cell Using Novel 4-Transistor XOR / XNOR Gates Based on Dynamic CMOS Logic”, International Journal of Applied Engineering Research, Volume 9, Number 11 (2014) pp. 1551-1564.[Indexed in SCOPUS]
  • Vikas K. Saini, Shamim Akhter, and Tanuj Chauhan, "Implementation, Test Pattern Generation, and Comparative Analysis of Different Adder Circuits," VLSI Design, vol. 2016, Article ID 1260879, 2016. doi:10.1155/2016/1260879.[Indexed in SCOPUS]
  • Anshul Singh, Vijay KhareShaurya Singh, Neha Mehra, Chakras Jain, Shamim Akhter, "Analysis and Identification of Parkinson disease based on fMRI", International Journal of Engineering Technology , Management and Applied Sciences, Vol 5,Issue 1, 2017, ISSN 2349-4476.[Indexed in Google Scholar]
  • Ankur Bhardwaj, and Shamim Akhter, “Modified Counter Based Approach for Digital Watermarking of Sequential Circuits “International Journal of Innovative Technology and Exploring Engineering (IJITEE),Vol .8 Issue.8 (2019), pp. 3409-3413[Indexed in SCOPUS]
  • Tukur Gupta, Shamim Akhter, Anandita Srivastava, Saurabh Chaturvedi, “HDL Implementation of Five Moduli Residue Number System”, International Journal of Innovative Technology and Exploring Engineering (IJITEE), Vol .8 Issue.9 (2019), pp. 689-693 [Indexed in SCOPUS]

International Conferences

  • Hemant K., Hamsavahini, Upadhyay P., and Shamim Akhter, “Design and implementation of crypto-based inter leaver for viterbi encoder and decoder using turbo codes”, in 7th International Conference on ASIC Proceeding ASICON, art. no. 4415778, pp. 906-909, Oct. 2007.[Indexed in SCOPUS]
  • Shamim Akhter, “VHDL implementation of fast NxN multiplier based on Vedic mathematic”, in 18th European Conference on Circuit Theory and Design, Sevilla, Spain, pp. 472-475, 26-30 August , 2007.[Indexed in SCOPUS]
  • Gupta, N., Gupta, S., Khare, V., Jain, C. K., and Shamim Akhter,“An efficient model to decipher the Electroencephalogram signals using machine learning approach”, in Biomed 2008 (4th Kuala Lumpur International Conference on Biomedical Engineering 2008), Kualalumpur, Malysia, published in IFMBE Proceedings , Vol. 21, 2008, pp.782-785, June 2008. [Indexed in Web of Science]
  • Shamim Akhter, V.Karwal, and R.C.Jain , “Implementation of Odd Discrete Cosine Transform (ODCT-II) using Distributed Arithmetic Approach”, in Proceeding of 3rd Nirma University International Conference on Engineering NUiCONE-2012, Nirma University, Ahmedabad, 2012. (IEEExplorer)
  • Shamim Akhter, V.Karwal, and R.C.Jain, “Implementation of Rectangular Windowed Odd Discrete Cosine Transform Update Algorithm Using Distributed Arithmetic Approach", International Conference on Signal Processing and Communication (ICSC-2013) December 12-14, 2013, pp. 381-386, JIIT NOIDA, India. (IEEExplorer)
  • Shamim Akhter and S. Chaturvedi,“HDL Based Implementation of NxN Bit-Serial Multiplier,” Proc. of IEEE International Conference on Signal Processing and Integrated Networks (SPIN-2014), pp. 470-474, Feb. 20-21, 2014, Amity University, NOIDA, India. (IEEExplorer)
  • Shamim Akhter and S. Chaturvedi, “A Novel Method for Dual Output Dynamic Logic Using SCL Topology,” Proc. of IEEE International Conference on Signal Processing and Integrated Networks (SPIN-2014), pp. 481-485, Feb. 20-21, 2014, Amity University, NOIDA, India. (IEEExplorer)
  • Shamim Akhter, S. Chaturvedi, and K.Pardhasardi, “CMOS Implementation of Efficient 16-Bit Square Root Carry-Select Adder,“ 2nd International Conference on Signal Processing and Integrated Networks (SPIN), India, Noida, pp. 891 – 896, Feb 2015(IEEExplorer)
  • Shamim Akhter, Vikas K. Saini, Jasmine Saini, "Analysis of Vedic  Multiplier using Various Adder Topologies", 4th International Conference on Signal Processing and Integrated Networks SPIN , Amity University, India, pp-173-176 March 2017 (IEEExplorer)
  • Shamim Akhter, G.  Raturi, S.Khan, “Analysis and Design of Residue Number System Based Building Blocks”, at 5th International Conference on Signal Processing Integrated Network, Amity University, pp-441-445,  Feb 2018(IEEExplorer)
  • Bhardwaj A., Shamim Akhter, “ IP Protection of Sequential Circuits Using Added States Watermark with Property Implantation”, Conference proceeding for ICSC 2018 in Advances in Signal Processing and Communication. vol 526. Springer, pp.521-528.
  • P.Kaushik, P Yadav, Shamim Akhter, “De-seasoning-Based Time Series Data Forecasting Method Using Recurrent Neural Network (RNN) and Tensor Flow,” Conference proceeding for ICSC 2018 in Advances in Signal Processing and Communication. vol 526. Springer, pp.393-400.
  • Shamim Akhter, S.Kumar and D.Bareja, “Design and Analysis of Distributed Arithmetic based FIR Filter”, Presented at IEEE International Conference on Advances in Computing, Communication Control and Networking, ICACCCN – 2018, at Galgotia College of Engineering and Technology, Greater Noida, India, pp. 721-726.[IEEE Explorer]
  • Shamim Akhter and S. Charurvedi, “Modified Binary Multiplier Circuit Based on Vedic Mathematics”, in 6th International  Conference on Signal Processing Integrated Network(SPIN-2019), March 2019 at Amity University, pp. 234-237.[IEEE Explorer]